Here is a link to Agarwal’s powerpoint given at the conference describing the likely strategies for the firm

http://www.ele.uri.edu/barc2006/talks/skp/skp-1-talk-barc2006-AgarwalA.pdf

My guess if it does not explicitly describe the intended products, it might give strong hints as to what he is doing…in multicore designs…

This public talk might be partly to recruit Boston area students / professionals to his firm? but not to keep it stealth?

Multicores are finally catching up to the late 70’s / mid 80s work of CMU’s HT Kung now at Harvard (now doing wireless, but then specializing in pathfinding research in systolic pipelined arrays)

When I was later in 84 at Intel and Cray in 86, I relished the thought of either firm doing massive multicore architectures, but Intel was disinterested, despite later actually building Kungs designs for the government and, and Seymour Cray was not even thinking of massively parallel beyond his favored vector SIMD architecture.

interesting how history eventually catches up…

From EEtimes
http://www.eetimes.com/news/latest/showArticle.jhtml?articleID=183702690

“And these systems may grow very large. The number of cores will double every 18 months, with 256-core systems commonplace by 2011, predicted Anant Agarwal, professor of engineering and computer science at the Massachusetts Institute of Technology and founder of startup Tilera Corp.”

I could not find patents by Prof. Agarwal that seem relevant to Multicores or FPGAs.

Multicores might be an interesting investment / business if done carefully and with some code compatability in the target hardware.